NEC µPC1555G2 - 555 Timer
CD4021BE - High Voltage Static Shift Registers
Original Harris Semiconductor CD4021BE - High Voltage CMOS 8-Stage Static Shift Registers.
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CD4021B series types are 8-stage parallel input/serial output registers having common CLOCK and PARALLEL/SERIAL CONTROL inputs, a single SERIAL data input, and individual parallel "JAM" inputs to each register stage. Each register stage is D-type, master-slave flip-flop. In addition to an output form stage 8, "Q" outputs are also available from stages 6 and 7. In the CD4021B serial entry is synchronous with the clock by parallel entry is asynchronous. In both types, entry is controlled by the PARALLEL/SERIAL CONTROL input. When the PARALLEL/SERIAL CONTROL input is low, data is serially shifted into the 8-stage register synchronously with the positive transition of the clock line. When the PARALLEL/SERIAL CONTROL input is high, data is jammed into the 8-stage register via the parallel input lines and synchronous with the positive transition of the clock line. In the CD4021B, the CLOCK input of the internal stage is "forced" when asynchronous parallel entry is made. Register expansion using multiple packages is permitted.
• Medium speed operation…12 MHz (typ.) clock rate at VDD – VSS = 10 V
• Fully static operation
• 100% tested for quiescent current at 20 V
• 8 master-slave flip-flops plus output buffering and control gating
• Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Parallel input/serial output data queueing
Parallel to serial data conversion
|Supply voltage range||3V - 18V|
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